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NANYA LPDDR2

作者： 來源: 發(fā)布時間：2020-06-02  瀏覽：18
關鍵字： NANYA LPDDR2

編輯：admin  最后修改時間：2020-06-02

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      • Bitmap Mobile LPDDR2
         Mobile LPDDR2
         ｜Density / 512Mb｜
         Org Part_Number Voltage Refresh Package Speed Avail MP Simulation
         X16 NT6TL32M16AQ-G1/G2 1.2V 8k PoP(168b) 800/667 Now Now IBIS, Verilog, Hspice
         X32 NT6TL16M32AQ-G1/G2 1.2V 8k PoP(168b) 800/667 Now Now IBIS, Verilog, Hspice
         ｜Density / 2Gb｜
         Org Part_Number Voltage Refresh Package Speed Avail MP Simulation
         X32 NT6TL64M32AQ-G0/G1(I)/G2(I) 1.2V 8k PoP(168b) 1066/800/667 Now Now IBIS, Verilog, Hspice
         ｜Density / 4Gb｜
         Org Part_Number Voltage Refresh Package Speed Avail MP Simulation
         X32 NT6TL128M32AQ-G0/G1/G2 1.2V 8k PoP(168b) 1066/800/667 Now Now IBIS, Verilog, Hspice
         X32 NT6TL128M32AI-G0/G1/G2 1.2V 8k BGA(134b) 1066/800/667 Now Now IBIS, Verilog, Hspice
         ｜Density / 8Gb｜
         Org Part_Number Voltage Refresh Package Speed Avail MP Simulation
         X32 NT6TL256T32AQ-G0/G1/G2 1.2V 8k PoP(168b) 1066/800/667 Now Now IBIS, Verilog, Hspice
         X32 NT6TL256T32AS-G0/G1 1.2V 8k PoP(216b) 1066/800 Now Now IBIS, Verilog, Hspice
         X64 NT6TL128T64AR-G0(I)/G1(I)/G2(I) 1.2V 8k PoP(216b) 1066/800/667 Now Now IBIS, Verilog, Hspice
         X64 NT6TL128T64A5-G0/G1/G2 1.2V 8k PoP(220b) 1066/800/667 Now Now IBIS, Verilog, Hspice